A conventional translation look-aside buffer (TLB) accepts a virtual address and returns one of two things, either a physical address or a signal that no virtual-to-physical address translation is stored in the TLB. If the “no translation available” signal is provided, conventional systems will typically “walk” a set of tables to determine whether information for making a virtual-to-physical address translation is stored in the set of tables. The set of tables may be referred to as a page table hierarchy. In different examples the set of tables may include a single table, a pair of tables, or more tables. The number of tables may depend on the size of the virtual address to be translated. If no information about the virtual address is stored in the set of tables, then a page fault occurs. When the page fault occurs, the page of memory is brought into memory, an entry is updated in either the TLB or the set of tables, and the virtual-to-physical address translation is attempted again.